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An Electrostatic Discharge Package Substrate Design for Pin Grid Array and Ball Grid Array Devices

IP.com Disclosure Number: IPCOM000083153D
Publication Date: 2005-Mar-01
Document File: 2 page(s) / 55K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a semiconductor device package with special electrostatic discharge (ESD) ground pins; the device can be used with pin grid array (PGA) and ball grid array (BGA) devices. Benefits include reducing the current entering the device and preventing damage to the internal circuitry on the silicon.

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An Electrostatic Discharge Package Substrate Design for Pin Grid Array and Ball Grid Array Devices

Disclosed is a method for a semiconductor device package with special electrostatic discharge (ESD) ground pins; the device can be used with pin grid array (PGA) and ball grid array (BGA) devices. Benefits include reducing the current entering the device and preventing damage to the internal circuitry on the silicon.

Background

As the speed and performance of devices increases, so does the sensitivity to ESD. Current flip chip PGA and BGA substrates are made of insulators that tribocharge at very high values. This causes the silicon die to be charged. As the device comes near a metal object (e.g. the pogo pins on sockets), an ESD event occurs as the charge on the silicon die dissipates through the device pin and onto the metal pogo pin. The higher the charge, the more likely the device will fail. Customers with poor ESD controls often experience high fallouts due to ESD. Currently, the following are employed to control and prevent ESD damage on devices:

§         Air Ionizers

§         Static dissipative pogo pins on sockets

§         Static dissipative materials for the socket base and floating base

§         Basic ESD controls (e.g. wrist straps, controlling RH, etc.)

General Description

The disclosed method is a robust ESD package substrate design for PGA and BGA devices that absorbs electrostatic energy in a controlled and safe condition, thus preventing damage to the internal circuitry within the Integrated Circuit (IC). The key element is a custom-made ESD ground pin which has a retractable static dissipative tip. This pin is electrically connected to the device ground or power, and is mounted o...