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Multigated "Dribble" Powered MOS FET Storage Cell

IP.com Disclosure Number: IPCOM000083225D
Original Publication Date: 1975-Apr-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Gladu, RG: AUTHOR [+2]

Abstract

This circuit reduces the amount of power dissipated by storage cells by powering then at one level, when they are interrogated at another level, when they are not being interrogated.

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Multigated "Dribble" Powered MOS FET Storage Cell

This circuit reduces the amount of power dissipated by storage cells by powering then at one level, when they are interrogated at another level, when they are not being interrogated.

Cross-coupled metal-oxide semiconductor field-effect transistor (MOS FET) devices F3 and F4 form a bistable circuit which stores a bit of binary information. The bit of binary information stored depends on whether F3 or F4 is conducting. While the circuit is not being addressed for reading or writing information, the bistable circuit is powered through resistors R1 and R2. Power supplied through these resistors is sufficient to maintain the state stored in the bistable circuit. That is, the current through the conducting FET device is sufficient to guarantee that the nonconducting FET device remains off.

However, the amount of power supplied to the bistable circuit is not sufficient for reading or writing. Therefore, additional power is supplied to the circuit when information is to be read or written in the cell. This is accomplished by turning FET device F1 on so as to shunt resistor R2, thereby increasing the current supplied to transistors F3 and F4. Reading and writing information Into the storage cell is accomplished by varying the voltages at the gate of device F1 and ac the bit sense terminals B0 and B1, in the manner usually associated with double-emitter storage cells.

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