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Browse Prior Art Database

Programmable Stepper Motor Control

IP.com Disclosure Number: IPCOM000083253D
Original Publication Date: 1975-Apr-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Check, GP: AUTHOR [+3]

Abstract

A stepper motor control system utilizes an initial program load to enter stepper motor timing sequences into a random-access storage (RAS). With this arrangement, the stepper motor can be operated at different speeds under program control.

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Programmable Stepper Motor Control

A stepper motor control system utilizes an initial program load to enter stepper motor timing sequences into a random-access storage (RAS). With this arrangement, the stepper motor can be operated at different speeds under program control.

RAS 10 in the drawing has sufficient capacity to store bytes of data for stepper motor control, as well as other control functions not illustrated. In this instance, sixteen addresses are reserved for stepper motor control. These addresses are allocatable to start, slow and stop sequences. There can be X-1 start, one slow and 16-X stop intervals. If the required control does not require X-1 start or 16-X stop intervals, the available intervals can be padded with slew rate intervals.

RAS 10 is initially loaded with data at the reserved addresses, under control of an initial program load program (IPL) represented by block 11. A byte of data (8 bits) is loaded at each address location accessed by storage address register (SAR) 12, as a write signal is applied to line 13.

The stepper motor for example may be used in a printer attached to a computer system. In any event, a start signal is issued from some control source to initiate operation of the stepper motor. This start signal is passed by OR circuit 16 as the first motor advance pulse. It also sets start/slew latch 17 and sets the four high-order bits in SAR 12 for addressing the first interval data to be read from RAS 10. The four low-order bits are loaded into SAR 12 from interval counter 20 via AND circuit 21, which receives a load SAR signal from sequence controller 25 and a signal from interval request latc...