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Josephson Cryotron Nonlatching Ternary Logic Circuit

IP.com Disclosure Number: IPCOM000083286D
Original Publication Date: 1975-Apr-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 3 page(s) / 42K

Publishing Venue

IBM

Related People

Fang, FF: AUTHOR [+2]

Abstract

Application of ternary (3-state) logic has been impeded by the lack of an attractive logic gate. A circuit is described herein which operates in a ternary mode. The circuit, as shown in Fig. 1, is a multiple gate, single output line arrangement. It should be appreciated that a single gate may be substituted for each of the multiple gate arrangements shown.

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Josephson Cryotron Nonlatching Ternary Logic Circuit

Application of ternary (3-state) logic has been impeded by the lack of an attractive logic gate. A circuit is described herein which operates in a ternary mode. The circuit, as shown in Fig. 1, is a multiple gate, single output line arrangement. It should be appreciated that a single gate may be substituted for each of the multiple gate arrangements shown.

Fig. 1 shows a plurality of Josephson logic gates; each set having a plurality of control lines 1, 2, respectively, coupled thereto. Voltage sources V1, V2 are connected, respectively, to the set of logic gates alpha, beta. An output line 3 is connected between logic gates alpha, beta at node n and is connected at node n1 to sources V1', V2', via terminating resistors 4, 5 each of value 2R.

Output line 3 has an impedance Z(o)=R. Currents through output line 3, which may be -I, +I, or 0, depending on the state of logic gates alpha, beta, are used to control other Josephson devices which may be electrically coupled to output line 3 via output controls 6.

Fig. 2 shows I-V diagrams for the three ternary states of gates alpha (shunted by 2R) loaded by gates beta (shunted by 2R).

In Fig. 2A, control currents suppress the I(max) of gates alpha while the I(max) of gates beta is relatively large. Operating point B (as shown in Fig 2C) is unstable because the current is less than I(min), the latter being the current at which a Josephson gate returns to the superconducting state. Point C is, therefore, the only stable state.

As a result of the application of control currents, gates beta are in the superconducting state while gates alpha are in the resistive state. Current flows in the resulting circuit arrangement from V1' through resistor 4 via line 3 through gates beta, which are superconducting, to V2; the latter being of lower potential than V1'. Current direction through line 3 is thereby determined and may be characterized as -I.

In Fig. 2B, control line inputs make I(max) of gates alpha large and I(max) of gates beta small. Under such circumstances, point A is the only stable state.

As a result of the application of control currents, gates alpha are in the superconducting state while gates beta are in the resistive state. Current flows in the resulting circuit arrangement from V1 via line 3 through resistor 5 to V2'. V2' is at...