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Level Shift Circuit

IP.com Disclosure Number: IPCOM000083541D
Original Publication Date: 1975-Jun-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Gaudenzi, GJ: AUTHOR [+2]

Abstract

The circuit depicted in the drawing converts logical input levels established by a ground-down technology (VG = -1.5V) to logical output levels which are TTL compatible. The circuit has drive capability because of its active pull-up transistor T2.

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Level Shift Circuit

The circuit depicted in the drawing converts logical input levels established by a ground-down technology (VG = -1.5V) to logical output levels which are TTL compatible. The circuit has drive capability because of its active pull-up transistor T2.

Schottky diodes SBD1, SBD2 and SBD3 provide gating and isolation between nodes A and B. Transistors T1 and T3 are Schottky clamped. Output transistor T3 is a multiemitter device capable of sinking the load current.

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