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Bidirectional Signal Level Converter for Interchip Communication

IP.com Disclosure Number: IPCOM000083546D
Original Publication Date: 1975-Jun-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Pelc, R: AUTHOR [+2]

Abstract

The circuit depicted in the drawing converts ground-down signal levels to ground-up signal levels and vice versa (bidirectional) for interchip communication.

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Bidirectional Signal Level Converter for Interchip Communication

The circuit depicted in the drawing converts ground-down signal levels to ground-up signal levels and vice versa (bidirectional) for interchip communication.

The send circuit comprises a predriver T1, T2, R1 and R2 and an off-chip driver T3 and R3. Operation is as follows: when point A is up, T2 is on, T3 is off and I/O signal line is at approximately VT.

When point A is down, T2 is off, T3 is on and I/O is at approximately 0.3V. From Thevenin's theorem, values of RT and VT from a +5V supply and a resistor divider network are such that +2.4 volts </- VT </- +3.7 volts.

Referring to the receive circuit, the incoming signal is sensed by T4 and the dividing network of R4, R5 and R6. This portion of the receiver circuit acts as a constant-voltage level shifting network from the I/O line to the emitter of T5 (point
C). Transistors T5 and T6 with resistors R7, R8 and R9 form the driver output of the receiver, to allow it to correctly interface with other ground-down circuits on the same chip. Diode D1 clamps the input signal level.

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