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High Input Impedance Current Switch Receivers for Chip to Chip Transmissions

IP.com Disclosure Number: IPCOM000083705D
Original Publication Date: 1975-Jul-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Gopalakrishna, YR: AUTHOR [+3]

Abstract

Figs. 1 through 5 each depict a high-input impedance current-switch receiver particularly adapted to receive off-chip signals. The receiver circuits translate the off-chip input signals into voltage levels compatible with transistor-transistor logic circuits on the chip. Each of these receiver circuits also permits the AND function of the "on" chip and "off" inputs.

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High Input Impedance Current Switch Receivers for Chip to Chip Transmissions

Figs. 1 through 5 each depict a high-input impedance current-switch receiver particularly adapted to receive off-chip signals. The receiver circuits translate the off-chip input signals into voltage levels compatible with transistor- transistor logic circuits on the chip. Each of these receiver circuits also permits the AND function of the "on" chip and "off" inputs.

The circuits, respectively, function to reduce the current in the input transmission line, to thereby minimize signal loss in the line. Referring to Figs. 1 through 5, this is accomplished by driving into the base of a transistor T1 which provides a high-impedance capacitive load.

Fig. 1 is a medium performance, high-input impedance current switch, with out-of-phase logic at output AI. This circuit may be used if minimum delays are not required.

Fig. 2 is a high-input impedance current switch receiver with in-phase logic at output AI. This circuit may be used if minimum delay and in-phase logic is required.

Fig. 3 is a high-performance, high-input impedance current switch receiver with out-of-phase logic at output AI.

Fig. 4 is similar to Fig. 3, but with skew control provided by resistor RC.

Fig. 5 is a high-input impedance current-switch receiver with in-phase logic at output AI. This circuit may be used if minimum delay and in-phase logic is required.

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