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Producing Si Wafers Without Crystal Defects

IP.com Disclosure Number: IPCOM000083735D
Original Publication Date: 1975-Jul-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Biedermann, E: AUTHOR [+2]

Abstract

The peripheral areas of Si wafers often contain crystal defects. The high temperatures used during the semiconductor process cause these defects to spread from the periphery towards the interior of the wafer, thus reducing the yield or the serviceable Si surface.

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Producing Si Wafers Without Crystal Defects

The peripheral areas of Si wafers often contain crystal defects. The high temperatures used during the semiconductor process cause these defects to spread from the periphery towards the interior of the wafer, thus reducing the yield or the serviceable Si surface.

A spread of the crystal defects can be avoided by covering the wafer periphery with a thermal SiO(2) layer for the duration of the semiconductor process. The SiO(2) cover on the wafer periphery is obtained by etching the SiO(2) layer which initially covers the full wafer surface only within the inner area, without etching the wafer periphery.

This etching process is readily, rapidly and reliably carried out as follows.

An etch-resistant, open-top beaker 1 is used. The clear width of the beaker is chosen so that the opening of the beaker 1 can be covered with a wafer 2, and that only the wafer periphery 3 not to be etched is placed on the rim of the beaker. To this end the rim of the beaker 1 can be provided with a recess 4 to accommodate wafer 2. The beaker is filled, for example, with an etchant 5 (50 per cent HF).

Wafer 2 with surface 6 to be etched is placed on the beaker 1 and is etched at room temperature in the vapor phase. The silicon tetrafluoride formed during this process immediately changes to the vapor phase. The periphery 3 of the wafer 2 covered by the rim of the beaker or the recess 4 is not etched, but the SiO(2) layer is removed from the whole...