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Personalized Logic Array Testing by Blocking

IP.com Disclosure Number: IPCOM000083743D
Original Publication Date: 1975-Jul-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Love, RD: AUTHOR [+2]

Abstract

Personalized logic array (PLA) is improved by appropriate blocking circuits installed between an AND array and an OR array. Appropriate test signals to the blocking circuits permits systematic testing of each output line independent of the other lines in the OR array. Systematic testing minimizes the number of test patterns to test the array.

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Personalized Logic Array Testing by Blocking

Personalized logic array (PLA) is improved by appropriate blocking circuits installed between an AND array and an OR array. Appropriate test signals to the blocking circuits permits systematic testing of each output line independent of the other lines in the OR array. Systematic testing minimizes the number of test patterns to test the array.

In Fig. 1, inputs 14 feed bit partitioning logic 12 which distributes the output signals over bit lines 16. Word line bundles 36 from the respective partitioned signals are provided as inputs to circuits 18. In one form these gates may be AND gates.

Alternatively, the gates may be adapted to perform NOR or NAND logic. The outputs of the gates 18 form word lines 20, which represent a part of the OR array or READ array 32. The word lines 20 are tapped by OR gate line bundles 34 which feed OR gates 22, to produce the array output on lines 24. The OR gates 22 may also be adapted to perform NOR or NAND logic as well as OR logic.

The AND gates 18 also receive input from blocking signals 34 which are provided as outputs from a shift register 26 responsive to input signals 28. The blocking signals 34 permit only a single word line 20 to be active. The blocking line carrying a 0 activates the gate 18 assuming that the gate is implemented as a NOR. All other gates 18 have outputs equal to zero.

The word line 20 carrying the 0 blocking signal will pass test patterns. Testing of the word line...