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Browse Prior Art Database

MOS Associative Memory Cell

IP.com Disclosure Number: IPCOM000083751D
Original Publication Date: 1975-Jul-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Bankowski, WF: AUTHOR [+2]

Abstract

This associative memory storage cell is composed entirely of metal-oxide semiconductors (MOS's).

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MOS Associative Memory Cell

This associative memory storage cell is composed entirely of metal-oxide semiconductors (MOS's).

In the quiescent state of this storage cell, composed of channel MOS devices, the bit lines B0 and B1 and the interrogate sense amplifier line ISA are at a positive potential, while the word line W/L is at ground potential. While in this quiescent state, information is stored in the cell by the conduction of either Q1 or Q2. With Q1 on and Q2 off a "0" is stored in the cell and with Q1 off and Q2 on, a "1" is stored in the cell.

To read information stored in the storage cell the word line W/L is taken from ground to some positive potential, turning either Q3 or Q4 on. If a 0 is stored in the cell, node a is near ground and thus Q3 is forward biased, causing a signal on the B0 bit line which is sensed by a sense amplifier. If a 1 is stored in the cell, node b is near ground potential thus turning Q4 on and causing a signal on the B1 bit line, which is detected by a sense amplifier coupled to that line.

Writing information into the storage cell is accomplished by taking either the B0 or the B1 bit sense line to ground, while simultaneously taking the word line W/L to some positive potential. If a 1 is to be written the BI bit line is brought to ground and if a 0 is to be written the B0 bit line is brought to ground. The effect of this action is to turn both Q3 and Q4 on if a change in the state of the cell is required to store the desired inf...