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Memory Space Mapping Using Virtual Addressing to Multiple Sized Memory Units

IP.com Disclosure Number: IPCOM000083825D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 3 page(s) / 51K

Publishing Venue

IBM

Related People

Tennison, RD: AUTHOR [+4]

Abstract

A memory apparatus operable with a plurality of hosts each having an independent address space, has the capability of accepting virtual addresses mixed with real addresses from any of the hosts.

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Memory Space Mapping Using Virtual Addressing to Multiple Sized Memory Units

A memory apparatus operable with a plurality of hosts each having an independent address space, has the capability of accepting virtual addresses mixed with real addresses from any of the hosts.

Each of several memory controllers connected to a host has a virtual address directory for the hosts A, B, C.... Each virtual address directory (VAD) has an R entry for indicating whether or not the address is real or virtual. That is, host A address 42, host B address 10, and host C address 03, all corresponding to virtual volume address 0001, have a 0 R-bit indicating that the addresses are virtual. On the other hand, virtual volume address (VVA) 0002 has a 1 R-bit indicating that all addressing to that VVA is on a real basis; i.e. there is no virtual translation.

In the particular virtual address directory, hosts B and C addresses 20 and 13 correspond to VVA 0002 on a real basis. It should be noted that the address space of B and C are mutually independent. All virtual address directories for each of the memory controllers are constructed in a similar manner.

The address VVA is an intermediate address for pointing to common or shared memory space. In a plural host system having independent address spaces, the intermediate address approach, i.e., only one VVA for a given memory space in the entire memory system, ensures that all hosts referring to a given memory space have some common name or designator, at least within the memory. In one memory configuration, the VVA's were fixed with the memory space. In another memory configuration, the VVA's were logical addresses, i.e., names of memory space with no particular relationship to given actual physical space.

The latter configuration provides the greatest flexibility, but does require additional memory controller action to translate the logical VVA name or address to real space. In one preferred form, for maximizing intermixing of memory units, such as direct access storage devices (DASD), also referred to as disk files, the VVA address referred to a logical unit address, i.e., an additional level of logical addressing for facilitating program manipulation of memory space for maximizing host utilization of such space, while controlling the number of DASD units necessary for servicing the host requirements.

In the latter memory configuration, each of the memory controllers has a page status table (PST) for all of the space under its jurisdiction. It should be noted that for each page status table, there may be corresponding page status tables in other memory controllers having identical entries. Hence, when there is a change in a logical address, VVA, assignment, all PST's having the VV...