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Substrate Voltage Shift Circuit

IP.com Disclosure Number: IPCOM000083872D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Sonoda, G: AUTHOR

Abstract

The substrate (V(sx)) voltage shift circuit illustrated in Fig. 1 permits end-of-life guard banding of field-effect transistor large-scale integration (FET LSI) chip threshold voltages (V(T)) when using on-chip V(T) compensating V(sx) generators.

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Substrate Voltage Shift Circuit

The substrate (V(sx)) voltage shift circuit illustrated in Fig. 1 permits end-of- life guard banding of field-effect transistor large-scale integration (FET LSI) chip threshold voltages (V(T)) when using on-chip V(T) compensating V(sx) generators.

The shift circuit adds a noncritical on-chip diffused resistor 4 from the gate of Q1 to VH and connects the gate of Q1 (node 6) to a test pad, which is connected to a module test pin (several chips may be connected together). Q1 and Q2 together form a voltage divider with an output at node 8. Point 6 is at VH if left floating, and during normal operation the desired reference potential is supplied at node 8. However, in the test mode, the voltage at point 6 can be raised or lowered with a corresponding known reference voltage change, which shifts the substrate voltage to a more negative or positive value, which permits guard banding the chip for end-of-life positive or negative V(T) changes.

Fig. 2 shows a typical V(sx) generator's operating voltage for nominal V(T) chips 10 and the positive and negative voltage shifts, using test pads or pins for end-of-life guard-banding of V(T) 12.

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