Browse Prior Art Database

Predistorting Transmission Line Driver

IP.com Disclosure Number: IPCOM000083873D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 5 page(s) / 109K

Publishing Venue

IBM

Related People

Widmer, AX: AUTHOR

Abstract

This predistorting transmission line driver is suitable for high-speed operation, and contains simplified control logic with a simple and uniform interface from the control logic to the analog circuit.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 57% of the total text.

Page 1 of 5

Predistorting Transmission Line Driver

This predistorting transmission line driver is suitable for high-speed operation, and contains simplified control logic with a simple and uniform interface from the control logic to the analog circuit.

Figs. 1, 3, and 5 show the control logic, which consists of two edge-triggered flip-flops with emitter-follower outputs. However, any logic circuit that generates output waveforms FF1 (Q) and FF2 (Q) and their complements with the timing relationships shown in Figs. 2, 4, or 6, is acceptable.

The logic circuit of Fig. 1 is the simplest configuration but it reduces phase distortion to a lesser degree than the other versions.

In the circuit of Fig. 3, when the delay DLY = 0, there is a smaller amplitude at the end of a long line. Figs. 3 and 5 give minimum phase distortion and good signal amplitude without adjustments over a wide range of transmission line distances, when the delay is between 0.2 and 0.3 of a basic clock period. The operation of the circuit of Fig. 5 depends only on the positive transitions of the clock; it has an advantage over Fig. 3, when only a poorly shaped clock is available.

The analog driver consists of two unequal current sources, 11 and I2 (see Fig. 1). The ratio of I1/I2 is in the 1.15 to 2 range, depending on the maximum transmission distance required. For instance, referring to Fig. 1, assume that I1 = 4 units of current and I2 = 3 units of current.

As shown in Figs. 1 and 2, current steering transi...