Browse Prior Art Database

Expanded Character Set

IP.com Disclosure Number: IPCOM000083918D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 4 page(s) / 131K

Publishing Venue

IBM

Related People

Halsey, RM: AUTHOR [+3]

Abstract

A character set such as the EBCDIC character set of a terminal, such as the IBM 3277 may be expanded by employing the overstrike principle. For example, the letter Phi can be printed on a typewriter by printing a 0, backspacing and overprinting a slash.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 4

Expanded Character Set

A character set such as the EBCDIC character set of a terminal, such as the IBM 3277 may be expanded by employing the overstrike principle. For example, the letter Phi can be printed on a typewriter by printing a 0, backspacing and overprinting a slash.

When direct superposition of two characters is attempted with a dot matrix character set, however, most of the characters will not be easily readable and many of the characters will have no particular meaning. For example, the character F and an underscore will not be uniquely identifiable when superimposed, unless a unique composite dot matrix pattern is employed as shown in Fig. 3.

The method of operation on the circuits of Fig. 1 occurs in the following steps:

1. The keyboard strobe signal generated within the keyboard 11, gates keyboard data bits for the first or understrike character to buffer register 15 via AND gate 13, and advances the random-access memory (RAM) address counter 17 via AND gate 19 at time zero (T0) if the overstrike key latch 21 was not set.

2. The contents of the buffer register 15 are loaded into the RAM 27, at a location identified by the RAM address counter 17 at time T1 by AND gate 53 and OR gate 55. The time counting clock, not shown, counts through T1 and resets to T0 when the overstrike latch 21 is not set.

3. The output of AND gate 19 also enables the keyboard 11 via OR gate 23 and time-delay circuit 25.

4. After the keyboard has been enabled, the operator depresses the overstrike function key to set overstrike key latch 21. When the overstrike latch is set, the time counting clock counts through T5 before being reset to T0.

5. The operator then depresses a data key, which is the overstriking character. The key depression is encoded into data bits and causes the data strobe to gate the data bits through AND gate 29 and OR gate 31 at time T0, into the read-only storage (ROS) address counter 33 as a low-order address. Latch 30 is also set to allow further overstrike logical operations. Latches 21, 30 and 38 are reset after the overstrike character code has been read out of ROS 36 via AND gate 43 or by the output of AND 47.

6. At time T1, a pointer address output from the low-order position of the location in ROS 36 which was addres...