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Tester for Logic and Storage Device and Initialization Procedure

IP.com Disclosure Number: IPCOM000083942D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

App, RH: AUTHOR

Abstract

The tester of the drawing supplies signals to test the logic and storage components of a circuit card. The tester responds to data that is stored on a magnetic disk, not shown, of a processor. This data signals the tester to identify the voltage levels that are to be supplied to the card, and the timing for pulses that are to be applied to each of the inputs to the card.

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Tester for Logic and Storage Device and Initialization Procedure

The tester of the drawing supplies signals to test the logic and storage components of a circuit card. The tester responds to data that is stored on a magnetic disk, not shown, of a processor.

This data signals the tester to identify the voltage levels that are to be supplied to the card, and the timing for pulses that are to be applied to each of the inputs to the card.

A card of a particular design is identified by a part number and this data is individual to each card part number. When a card with a part number is to be tested, card designers supply new data to the test personnel who enter this information in the disk storage of the processor.

Data for a test is stored in the format of a punched card. The timing for a particular input line to the card under test is stored in a particular column of the card image, and a row in a card image represents an increment of time in the operating cycle of the card under test. To enter the timing for an input line to the card under test, a column in this punched card image in the processor storage is accessed by entering a code and the column number by a keyboard 2.

A timing entry is then entered by an interrupt to the processor that is produced by manually operated switches that are shown in the drawing as a block with the entry, "10100". Bit positions in the interrupt message are indicated by the numbers 0 and 4 above this block. The 1 in bit position 0 s...