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Josephson Junction Complementary Circuit

IP.com Disclosure Number: IPCOM000083976D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Baechtold, W: AUTHOR

Abstract

An inverting logic gate in Josephson junction complementary circuit technology is made monostable by a bias current I-CO. Additional tracking means are provided to compensate for tolerances of maximum supercurrent and of resistance values.

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Josephson Junction Complementary Circuit

An inverting logic gate in Josephson junction complementary circuit technology is made monostable by a bias current I-CO. Additional tracking means are provided to compensate for tolerances of maximum supercurrent and of resistance values.

Such circuit comprises two series-connected Josephson junctions J1, J2 connected to a low impedance voltage source VG, through resistance 3 which supplies a voltage in the range of the gap voltage. Therefore, only one of the junctions J1, J2 can exist in the voltage state at a time.

In the quiescent state, the complementary circuit J1 is superconducting and J2 is in the voltage state, because the maximum supercurrent is made smaller in J2 by applying a bias control current I-CO via resistance 4. Thus current is branched to parallel load impedance 2, which current can be used as logic output I-OUT at the node between both junctions J1, j2.

Logic input signals are combined to control current I-C which causes j1 to switch into the voltage state such that now J2 becomes superconducting. Hence, the voltage drop across load impedance 2 vanishes and so does the output current I-0UT.

To compensate possible deviations in circuit properties, a further control line is provided at each Josephson junction J1, J2 which is supplied with the difference of two additional opposing control currents I-C1 and I-C2. Partial current I-C1 is determined by the gap voltage +VG, the resistance 5 and the inserted J...