Browse Prior Art Database

Storage Checkout Method

IP.com Disclosure Number: IPCOM000083982D
Original Publication Date: 1975-Aug-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 14K

Publishing Venue

IBM

Related People

Friend, DJ: AUTHOR

Abstract

A significant diagnostic problem in the checking of large-scale integration (LSI) circuits is that of interaction. The physical proximity of the bits within the chip is such that the interaction between neighboring bits, or between bits and address lines etc., is one of the most common forms of failure. Failures include:- A. A single bit cell fails, independently of the other bits - a Static failure. B. Bits, address lines, etc., interact within a chip, due to fusion or some other breakdown of the layers within the chip. C. The address decoding circuits fail. B and C are Dynamic failures.

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Storage Checkout Method

A significant diagnostic problem in the checking of large-scale integration (LSI) circuits is that of interaction. The physical proximity of the bits within the chip is such that the interaction between neighboring bits, or between bits and address lines etc., is one of the most common forms of failure.

Failures include:- A. A single bit cell fails, independently of the other bits - a Static failure.

B. Bits, address lines, etc., interact within a chip, due to fusion or some other breakdown of the layers within the

chip.

C. The address decoding circuits fail. B and C are Dynamic failures.

One result of using high-density circuitry, is that failures are frequent enough to demand either error correction codes and circuitry or 'redundancy' for normal logic, to allow correctable errors to remain in the machine until degradation of performance or some other criteria dictates a replacement. This means that failures must not only be detected but also counted. It is usual to count the number of failures on each storage card, giving an indication as to which ones to change as part of maintenance - to avoid double failures from occurring.

Because single-bit failures are correctable by an error checking and correction (ECC), they must not be allowed to cause an error stop in diagnostics. Double-bit failures must be detected and an error stop given. To do this, it is necessary to count the number of failures within each storage word. This is a "horizontal" count. A "vertical" count is made of the failures on each card.

A method to overcome the problems inherent in maintaining horizontal and vertical count is described. 1) Starting from location 0, store pattern A throughout

storage.

2) Starting from 0 again, increment up storage, doing the

following sequence for each storage word, X,:

Read X, check for pattern A.

Store (complementary) pattern B in X.

Increment X to next address.

When the top of storage has been reached, come back down: Read X, check for pattern B.

Store pattern A in X.

Decrement X to next address.

3) The whole sequence is then repeated, with the patterns

swapped.

In this way, when any address Y is reached on the way up, the complement pattern will have been written to ALL addresses below. If there is any interaction between Y and a lower address it will be detected at this point. Similarly, when Y is reached on the way back down, the complement pattern will have been written to all addresses above, and so any interaction between Y and a higher address

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will be detected. Since, also, each storage word has been loaded with both patterns A and B, every bit cell has been tested with both polarities.

This scheme, then, in just a few passes of storage, detects all failures of both the Static and Dynamic types....