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Indirect Instruction Set Architecture

IP.com Disclosure Number: IPCOM000084001D
Original Publication Date: 1975-Sep-01
Included in the Prior Art Database: 2005-Mar-01
Document File: 2 page(s) / 13K

Publishing Venue

IBM

Related People

Hall, CD: AUTHOR [+2]

Abstract

Described is a technique for adding control words to a processor's architecture, which allows each instruction to be much more powerful without the cost of more bits per instruction.

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Indirect Instruction Set Architecture

Described is a technique for adding control words to a processor's architecture, which allows each instruction to be much more powerful without the cost of more bits per instruction.

In a traditional instruction set, each instruction consists of an Op code and one or more operand fields. Each bit or group of bits of the instruction has a particular meaning.

For two examples consider the Load Register and Branch on condition instructions. In a small processor the load register may be, for instance, a one- byte instruction with a 4-bit Op code which specifies the instruction, and a 4-bit operand which specifies which register is to be loaded into the accumulator. Branch on Condition may be a 2-byte instruction with a 4-bit Op code, a 4-bit Condition operand and an 8-bit displacement operand.

If it is desired to expand the instruction, then it requires the addition of more bits. In order to do this, in the past, meant that the instruction had to be not only more powerful, but it also required more memory to store and required more time to execute.

The implementation of control words into a processor's architecture will require additional memory control words, which are referred in control space. Only one of the control words can influence the processor at any one time. Whichever control word is influencing the processor will be residing in a faster location than the other memory control words, and will be referred to as the activated register. Specific Op codes are made available in order to manage the control space.

The contents of the control registers should be such that it does not have to be changed after every few instructions. This philosophy must be followed by the designer in choosing the format of the control words. If this approach is violated, then the Indirect Instruction Set could have serious overhead problems of constantly having...