Browse Prior Art Database

Field Effect Transistor Driver Circuit

IP.com Disclosure Number: IPCOM000084044D
Original Publication Date: 1975-Sep-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Kalter, HL: AUTHOR [+2]

Abstract

The circuit is a high-performance, low-power circuit employing a feedback path from output to input, to insure that a steady-state current does not flow in either the up or down state of the output.

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Field Effect Transistor Driver Circuit

The circuit is a high-performance, low-power circuit employing a feedback path from output to input, to insure that a steady-state current does not flow in either the up or down state of the output.

In operation, assume that VH equals 10 volts and that node A is precharged to approximately 8 volts. With Estart at 0 volts nodes B and C are at 0 volts. When Estart rises to 10 volts node A is coupled to approximately 15 volts via C1 and node B is charged to 10 volts through transistor T1, turning on transistor T2.

Transistor T3 is chosen such that node C reaches a threshold voltage VT when node B just reaches 10 volts to turn on transistor T4 and turn off T1, trapping charge at node B. Node A is now less than the threshold voltage of T3, which turns off, allowing node C to rise rapidly due to bootstrapping into node B through capacitor CBS. When Estart returns to 0 volts, a change does not occur in the circuit since T1 is off.

In order to return the output to the down state, an Estop pulse of 10 volts is applied to transistors T5 and T6 turning them on to discharge nodes B and C and to turn off T4. Node A now charges to approximately 8 volts through transistor T7. When Estop returns to 0 volts, the voltages at nodes A, B and C do not change and the circuit is in condition for another Estart pulse.

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