Browse Prior Art Database

Dual Chip Structure for Bubble Lattice Devices

IP.com Disclosure Number: IPCOM000084116D
Original Publication Date: 1975-Sep-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Moore, EB: AUTHOR [+2]

Abstract

A dual-layer bubble lattice device is shown in the figure. Bit positions are defined by a translatable bubble lattice in a conveyor layer. Data is represented by the presence or absence of bubbles in a storage layer. Bubble domains in the two layers are magnetically coupled and translate in unison.

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Dual Chip Structure for Bubble Lattice Devices

A dual-layer bubble lattice device is shown in the figure.

Bit positions are defined by a translatable bubble lattice in a conveyor layer. Data is represented by the presence or absence of bubbles in a storage layer. Bubble domains in the two layers are magnetically coupled and translate in unison.

The two bubble domain films with appropriate magnetic and thickness properties are prepared on separate substrates. Subsequent personalization for their respective functions may include the fabrication of a desired surface topography and the deposition of suitable metallization patterns. The two substrates are finally mounted with the two films at a controlled spacing facing each other.

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