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Browse Prior Art Database

N Channel MOSFETS Having a Common Field Channel Implant

IP.com Disclosure Number: IPCOM000084172D
Original Publication Date: 1975-Sep-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 3 page(s) / 65K

Publishing Venue

IBM

Related People

Dennard, RH: AUTHOR [+2]

Abstract

N-channel, metal-oxide-silicon, field-effect transistors (MOSFETs) often utilize additional P-type (boron) doping under the thick, field, isolation oxide to prevent parasitic conduction between adjacent MOSFETs, and under the MOSFET gate oxide to adjust the FET threshold voltage.

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N Channel MOSFETS Having a Common Field Channel Implant

N-channel, metal-oxide-silicon, field-effect transistors (MOSFETs) often utilize additional P-type (boron) doping under the thick, field, isolation oxide to prevent parasitic conduction between adjacent MOSFETs, and under the MOSFET gate oxide to adjust the FET threshold voltage.

Typically, the additional P-type doping is achieved by two separate ion implantations of boron. In many cases, it would be desirable to combine these two implantations into a single, common, field/channel implant for the purposes of simplifying the process and improving the doping profile control.

One way to achieve a single implant is to thermally grow the thick, field, isolation oxide and then implant through it with high-energy boron atoms (Ref. 1). With that approach it is difficult to control the doping profile in the silicon, which results from high-energy ions penetrating through the field oxide.

Another approach, which has been considered, is to implant low-energy boron ions into the bare silicon wafer, and then thermally grow the field oxide. This approach also has profile control problems because the growing thermal oxide consumes (or depletes) a very large fraction of the implanted boron. A workable solution utilizing a common field/channel implant is the subject of this description.

The figure illustrates the basic concept. Boron ions (B/11/, 40 KeV, 8x10/11/cm/-2/) are implanted through a thin (500 Angstrom) thermally-grown screen oxide on a P-type silicon wafer having a resistivity in the range of 2- 15,ohm-cm (or typically, 10 ohm-cm). After implantation, some (about 200 Angstrom) of the 500 Angstrom screen oxide will be removed during the buffered HF cleanup that follows implantation. Then, a thick, field, isolation oxide (of about 5500 Angstrom) is chemically vapor deposited (CVD) at low temperature (800 C). The implanted boron profile under the screen oxide is essentially unperturbed during the oxide deposition. The CVD oxide is then densified and stabilized by a phosphosilicate glass treatment. This completes the fabrication of the field isolation oxide.

The next step is to use lithographic masking procedures for fabricating metal- gate or polysilicon-gate MOSFETS in a well-known manner. The masking scheme for fabricati...