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Balancing Josephson Junction Memory Cells

IP.com Disclosure Number: IPCOM000084175D
Original Publication Date: 1975-Sep-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Zappe, HH: AUTHOR

Abstract

In a Josephson junction memory cell the bit line has to overlap the memory loop at least in the position(s) of the write gate(s). Similarly, the sense gate is controlled by a part of the memory loop. Therefore, both the sense and the bit line induce current into the memory loop which, being superconductive, must set up a circulating current to cancel the flux produced by the currents flowing in these lines. Although being an inductive coupling the induced currents are DC, because of the mentioned superconductive properties of the memory loop.

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Balancing Josephson Junction Memory Cells

In a Josephson junction memory cell the bit line has to overlap the memory loop at least in the position(s) of the write gate(s). Similarly, the sense gate is controlled by a part of the memory loop. Therefore, both the sense and the bit line induce current into the memory loop which, being superconductive, must set up a circulating current to cancel the flux produced by the currents flowing in these lines. Although being an inductive coupling the induced currents are DC, because of the mentioned superconductive properties of the memory loop.

With a current I(B) flowing in a bit line the induced current I(L) is to the first order given by;

(Image Omitted)

where L(o) is the length of the overlap between line and loop and L(loop)is the loop length. In miniaturized devices the loop length is almost solely determined b the length of the gates, so that L (o) --> 0.5L(loop). In such a case almost half of the bit current is induced into the memory cell.

The result of such an induction is that the operating margins are lowered. With a crosstalk of 0.5, the write margins of an otherwise ideal memory cell are lowered by a factor approaching 2. In a practical cell subjected to parameter variations as well as bit word and sense current disturbs, the write margins disappear with a crosstalk of only 0.2. The sense line crosstalk has similar effects.

The crosstalk can be completely eliminated if the bit and the sense lines are placed ov...