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Programmable Flip Flop

IP.com Disclosure Number: IPCOM000084194D
Original Publication Date: 1975-Oct-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Gersbach, JE: AUTHOR

Abstract

This teaches a method of personalizing sequential and latching functions on a programmable logic array chip. A programmable logic array is comprised of an input bit decoder, an AND array feeding an OR array which, in turn, provides an output to an output register with a feedback to the AND array. Thus the programmable logic array is basically a table look-up structure, where the AND array forms the look-up library and the OR array forms the resulting output for the operation.

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Programmable Flip Flop

This teaches a method of personalizing sequential and latching functions on a programmable logic array chip. A programmable logic array is comprised of an input bit decoder, an AND array feeding an OR array which, in turn, provides an output to an output register with a feedback to the AND array. Thus the programmable logic array is basically a table look-up structure, where the AND array forms the look-up library and the OR array forms the resulting output for the operation.

The AND array consists of many words and is partitioned into two sections: the external field and the feedback field. Both of these fields are processed in parallel in the AND array to select words in the OR array

The OR array performs the logical OR operation on the values written in the selected words. The OR array is also partitioned at the two fields, one field gated to the external outputs through the output register and the other gated through the feedback into the AND array.

The method concerns personalization of the output registers of such programmable logic arrays to provide additional logic levels to the output register. Each output register is usually driven by two lines from the OR array. The available function at this level can be enhanced by inserting a two-bit decoder between the 0R array and the output register. The output register so used thus must have four control lines and a clock input. The control lines input can be called change, no change, set...