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Deposition of Gap Heteroepitaxy on Silicon

IP.com Disclosure Number: IPCOM000084468D
Original Publication Date: 1975-Nov-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Kemlage, BM: AUTHOR

Abstract

During the course of light-emitting diode (LED) development, one of the objectives of the industry has been to find a process which will allow the integration of LED materials and silicon technologies. The described process has been found to be successful in the deposition of GaP heteroepitaxy of good quality on silicon substrates.

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Deposition of Gap Heteroepitaxy on Silicon

During the course of light-emitting diode (LED) development, one of the objectives of the industry has been to find a process which will allow the integration of LED materials and silicon technologies. The described process has been found to be successful in the deposition of GaP heteroepitaxy of good quality on silicon substrates.

This process involves two steps. The first step involves the nucleation and coalescence of the heteroepitaxial interface at higher temperatures, and the second step involves the homoepitaxial deposition of GaP on GaP. This is a lower temperature process.

Example: A mirror smooth heteroepitaxy has been achieved by depositing a thin layer of Gap ( <0.5 mu ) at 1000 degrees C, followed by deposition of GaP at 850 degrees C using a pyrolytic organometallic system on a silicon substrate misoriented from the (100) orientation approximately 3 degrees. Depositions maintained at 1000 degrees C for total growth contained twins and hillock formations. Those runs deposited at 850 degrees C only, contained twins and hillock formations.

The initiation at high temperature must include nucleation and coalescence of nuclei, but the temperature must be lower before homoepitaxy becomes the predominant reaction.

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