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Calculation of Minimum Pattern to Pattern Spacing in Optical Masks

IP.com Disclosure Number: IPCOM000084483D
Original Publication Date: 1975-Nov-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 3 page(s) / 16K

Publishing Venue

IBM

Related People

Jacobson, EC: AUTHOR [+2]

Abstract

This is a data processing technique for checking engineering layout designs of optical masks utilized in semiconductor fabrication.

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Calculation of Minimum Pattern to Pattern Spacing in Optical Masks

This is a data processing technique for checking engineering layout designs of optical masks utilized in semiconductor fabrication.

The processing steps in the fabrication of integrated circuits involve the exposure to light of the semiconductor substrate, coated with a light-sensitive photoresist, sequentially through a series of masks. Such masks allow the passage of light through accurately defined windows or transparent regions. The particular geometry of each mask or pattern of opaque and transparent regions will determine the photoresist pattern adhering to the substrate during each particular processing step and, consequently, will determine the patterns of the various impurity diffusion or metallurgy applied during a particular processing step.

The relationship of the positions of the various diffused regions, regions of metallurgy and insulated regions, is critical to the fabrication and operation of the integrated circuit. Such regions are customarily in the form of polygons or combinations of polygons.

With the increasing automation in the fabrication of integrated circuits, at the present stage, the masks for the various fabrication levels are generated automatically, e.g., by a programmed light table as described in "Automatic Artwork Generation for Large Scale Integration" Cook et al IEEE Journal of Solid State Circuits, Vol. SC-2, No. 4, December 1967. As described in this publication, the input to the artwork generator or light table is in the form of digitized instructions which define the polygon or masked areas to be generated by the light table.

The digitized information is based upon the numerical coordinate values which are known for the mask polygons. This digitized coordinate value input to the programmed light table has been previously generated by known fully automated or computer-aided design techniques, which convert the required circuit specifications into the digitized data for a set of masks necessary to fabricate the integrated circuit embodying the circuit specifications. This digitized data useful in the preparation of a set of masks may also be used to control an electron beam, capable of selectively exposing the photoresist sensitized surface of a semiconductor integrated circuit structure.

In the present advanced state of the integrated circuit design art, there is a continuing need for means for analyzing the digitized data representative of the various mask geometries and to predict, in advance of the actual fabrication of the integrated circuit, potential problems with respect to the mask or device layout. Even the mere printing of an enlarged computerized plot representative of a moderately complex integrated circuit mask requires 20 hours by presently known plotters.

By developing the ability to analyze in an automated manner, the representative digitized data, the need for producing enlarged computerized plots, experimenta...