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Voltage Level Adapter Circuit

IP.com Disclosure Number: IPCOM000084629D
Original Publication Date: 1975-Dec-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Denis, B: AUTHOR

Abstract

This circuit allows two input levels to be converted into two predetermined output levels.

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Voltage Level Adapter Circuit

This circuit allows two input levels to be converted into two predetermined output levels.

The circuit comprises a receiver or input stage consisting of NPN transistors T1, T2, T3 and T4 which constitute a current switch, an input level shifter stage composed of PNP transistor TX and NPN transistors T5 and T6, and an output driver stage composed of transistor T7. The circuit further includes a load resistor RC and clamping diodes D2 and D3.

When the input level is -0.8 volt, transistors T1 and T2 are in a conductive state while T3 is off. Node A is at a downlevel while nodes B and C are grounded. PNP transistor TX and transistor T7 are both off. The output is then at an uplevel (-1.5 volts).

When the input level decreases from -0.8 volt to -2 volts, transistor T2 is turned off while T3 is turned on. Transistors T5 and TX become conductive and the collector current Ic of TX increases, causing transistors T6 and T7 to turn on. The voltage at node C will then decrease, causing transistor T5 to turn off. Since the voltage at node B decreases until it is clamped by diode D3, and since transistor T5 is off, transistor TX is turned on more quickly. Under steady-state conditions, the output is at a downlevel (-4 volts).

When the input level increases, from -2 volts to -0.8 volt, transistor T2 is turned on and T3 off. The voltage at node B decreases while the voltage at node A increases, thereby causing PNP transistor TX to be turned off more...