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Integrated Circuit Push Pull Current Amplifier

IP.com Disclosure Number: IPCOM000084801D
Original Publication Date: 1976-Jan-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Buckley, F: AUTHOR [+3]

Abstract

Fig. 4 of the publication entitled "Push-Pull Circuit", F. Buckley III, IBM Technical Disclosure Bulletin, Vol. 16, No. 5, October 1973, pages 1549-1550, illustrates examples of three different configurations of a lateral PNP/vertical NPN combination which provide improved gain, beta and current capacity. As a result of these improvements, the normally low bandwidth of the lateral PNP is boosted, i.e., significantly increased.

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Integrated Circuit Push Pull Current Amplifier

Fig. 4 of the publication entitled "Push-Pull Circuit", F.

Buckley III, IBM Technical Disclosure Bulletin, Vol. 16, No. 5, October 1973, pages 1549-1550, illustrates examples of three different configurations of a lateral PNP/vertical NPN combination which provide improved gain, beta and current capacity. As a result of these improvements, the normally low bandwidth of the lateral PNP is boosted, i.e., significantly increased.

The integrated circuit (IC) push-pull current amplifier 1 in the figure employs the principles of the aforementioned publication in its push-pull stage 2 and output amplifier stage 3. More specifically, NPN transistor 4 and lateral PNP transistor 5 in combination with transistor diodes 6, 7 are configured as a well- known push-pull dircuit.

To enhance the characteristics of PNP 5, it is connected to a vertical NPN transistor 8 in the aforementioned combination. By way of example, this combination 9 is illustrated as having the configuration which includes transistor- diode 10, i.e., an NPN transistor with its collector-base shorted, and resistors R1, R2, where R1 > R2, and which is one of the three configurations of the aforementioned publication.

By placing diode 10 at the base of transistor 8, current is diverted from its base, through the appropriately poled diode 10 and resistor R1. As a result, the current through R2 is controlled while taking advantage of the bandwidth of transistor 8.

Amplifier 3 has two output stages 11, 12 coupled to the respective current paths of NPN transistor 4 and PNP combination 9, respectively, of push-pull 2. For simi...