Browse Prior Art Database

Self Adjusting Digital to Analog Converter

IP.com Disclosure Number: IPCOM000084833D
Original Publication Date: 1976-Jan-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Croisier, A: AUTHOR

Abstract

Shown is a digital-to-analog converter comprising feedback loops which allows the weights of the summing network to be adjusted, in order to reduce the error on the output analog signal.

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Self Adjusting Digital to Analog Converter

Shown is a digital-to-analog converter comprising feedback loops which allows the weights of the summing network to be adjusted, in order to reduce the error on the output analog signal.

The digital-to-analog converter comprises (n + 1) voltage sources S0, S1, ..., Sn generating weighted signal components Wo = Vo, W1 = 2Vo ... Wn = 2/n/Vo. Depending upon the specific values of the (n + 1) bits of the word to be converted applied to the sources SO to Sn, given sources SO to Sn are turned on and the corresponding signal components are summed through summing network Sigma. In order to have the output analog voltage varying from +Vx to -Vx, a compensating source Sx provides a voltage equal to -Vo(2/n/-0.5) to network Sigma.

In order to reduce the error on analog output signal around zero volt level, the following condition has to be met: Wn = Wo + Sigma/n-1/(o) Wj.

Consequently, a source So providing a weighted component W'o = Wo is added at the input of network Sigma and weights Wx and Wn are adjusted through feedback loops L1 and L2. The adjustment is performed in two steps by comparator C feeding integrators I1 and I2 through normally open switches 1 and
2.

During a first step, sources S'O and SO to S(n-1) are turned on. Source Sn is turned off and switch 1 is closed. Comparator C measures the DC offset from zero volt and compensates it through feedback loop L1 by modifying Wx. Wx is held at the proper value when S1 opens...