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Programmed Logic Array Error Detection Circuit

IP.com Disclosure Number: IPCOM000084851D
Original Publication Date: 1976-Jan-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 61K

Publishing Venue

IBM

Related People

Westhoff, RJ: AUTHOR

Abstract

The programmed logic array (PLA) chip 11 in the figure shows an advantageous error detection circuit using critical circuit redundancy. AND array 13 and OR array 15 each have duplicate ALU logic 17 and 19. Input bus receivers 21 and output latches 23 and output drivers 25 are also redundant as well as comparator logic 27 and 29. Two control lines, gate 1 and gate 2, allows one of the ALU logic circuits 17 or 19 and one comparator circuit 27 or 29 to be inhibited during diagnostic procedures.

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Programmed Logic Array Error Detection Circuit

The programmed logic array (PLA) chip 11 in the figure shows an advantageous error detection circuit using critical circuit redundancy. AND array 13 and OR array 15 each have duplicate ALU logic 17 and 19. Input bus receivers 21 and output latches 23 and output drivers 25 are also redundant as well as comparator logic 27 and 29. Two control lines, gate 1 and gate 2, allows one of the ALU logic circuits 17 or 19 and one comparator circuit 27 or 29 to be inhibited during diagnostic procedures.

The output buses from drivers 25 provide a zero voltage binary 1 state and, therefore, can be DOT ORed to one set of chip BUS OUT pins.

Signals on BUS OUT are compared by comparators 27 and 29 with the output latch 23 result provided by each ALU logic circuit. With this circuit, all error failures are detectable including chip drive 25 failure. A failure of a driver 25 to a binary 0 positive voltage state will not cause an error, because the switching device of the other DOT ORed driver will provide a binary 1 zero voltage state.

Because the DOT OR output provides the important error detection feature, ALU 19 and comparator 29 could be placed on a separate PLA chip identical to the chip containing ALU 17 and comparator 27, with the DOT OR function being performed by wiring on the chip mounting circuit board.

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