Browse Prior Art Database

Intermixed Update of Memory Refreshed Raster Displays

IP.com Disclosure Number: IPCOM000084921D
Original Publication Date: 1976-Jan-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 3 page(s) / 36K

Publishing Venue

IBM

Related People

Bantz, DF: AUTHOR [+2]

Abstract

This intermixed update-refresh configuration enables massive updates to be made in a memory-refreshed raster display, without causing the picture to flicker or go blank while such updates are being entered.

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Intermixed Update of Memory Refreshed Raster Displays

This intermixed update-refresh configuration enables massive updates to be made in a memory-refreshed raster display, without causing the picture to flicker or go blank while such updates are being entered.

In a display system of the kind presently under consideration, a random- access memory 1 is dedicated to the display unit and forms an integral part of its refresh loop. During normal refresh operation the memory address register (MAR) 2 receives successive addresses from the refresh address counter (RAC) 3, for causing 1 and 0 bits to be read out of successive positions in the memory 1 into the refresh data register (RDR) 4, from which such bits are sequentially extracted during the raster line scans to form the light and dark elements of the displayed picture. When updating changes are to be made in the picture, the update information is entered into the appropriate bit storing positions in memory 1, from which in due course it is read out to the RDR 4 as the picture scanning process reaches those positions.

When updates are infrequent and do not involve many bits, they can be entered into the memory 1 during the vertical retraces which occur between successive fields of the picture scan. In situations where updates are likely to be frequent and numerous, however, they must be entered into the memory 1 during times when refresh operations are being performed.

Under these conditions, it is desirable that the interruptions of the refresh process be handled in such manner as to cause no significant degradation of the picture. If the screen becomes blank even for a brief instant while an update is being made, this can have a disturbing effect upon the operator. The illustrated arrangement enables even massive updates to be accomplished without completely losing the picture at any time, the result being a "crossfade" between old and new pictures that is much less disturbing than a flicker or blackout would be.

The key elements of this improved system are an update address counter (UAC) 5 and an update data register (UDR) 6 which are operated by the update control unit 7. When an updating bit or bit string is to be entered into the memory 1, the UAC 5 is set to the coordinate ad...