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Erasable Nonvolatile Memory Device Using Hole Trapping in SiO(2)

IP.com Disclosure Number: IPCOM000084939D
Original Publication Date: 1976-Jan-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 3 page(s) / 38K

Publishing Venue

IBM

Related People

Ning, TH: AUTHOR [+2]

Abstract

Dual-dielectric structures such as metal-Si(3)N(4)-SiO(2)-Si (MNOS) devices possess memory function, because of the high concentration of electron traps in the Si(3)N(4) layer. Recent experiments by Arnett and Yun (P.C. Arnett and B.H. Yun, Appl. Phys. Lett. 26, 94 (1975)) showed that for Si(3)N(4) the electron trap concentration, N(T), is about 6 x 10/18/ cm/-3/, and the electron capture cross section, Sigma, is about 5 x 10/-13/ cm/2/. A single-dielectric structure using trapped holes, instead of trapped electrons, for memory function is described herein. Specifically, the conventional metal-SiO(2)-Si or polysilicon-SiO(2)-Si layer is described. Erasure of memory is accomplished by electron capture at the trapped hole centers.

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Erasable Nonvolatile Memory Device Using Hole Trapping in SiO(2)

Dual-dielectric structures such as metal-Si(3)N(4)-SiO(2)-Si (MNOS) devices possess memory function, because of the high concentration of electron traps in the Si(3)N(4) layer. Recent experiments by Arnett and Yun (P.C. Arnett and B.H. Yun, Appl. Phys. Lett. 26, 94 (1975)) showed that for Si(3)N(4) the electron trap concentration, N(T), is about 6 x 10/18/ cm/-3/, and the electron capture cross section, Sigma, is about 5 x 10/-13/ cm/2/. A single-dielectric structure using trapped holes, instead of trapped electrons, for memory function is described herein. Specifically, the conventional metal-SiO(2)-Si or polysilicon-SiO(2)-Si layer is described. Erasure of memory is accomplished by electron capture at the trapped hole centers.

Experiments using polysilicon-SiO(2)-silicon field-effect transistor (FET) devices revealed the following properties of hole traps in thermal SiO(2): (i) N(T) Approx./= x10/18/ cm/m/-3// (ii) Sigma Approx./= 3 x 10/-13/ cm/2/.

Thus, values of N(T) and Sigma for holes in SiO(2) are comparable to those for electrons in Si(3)N(4). Thus, the efficiency of hole trapping in SiO(2) is comparable to electron trapping in Si(3)N(4). Analysis shows that the trapping efficiency, defined as [C(ox) Delta V(T)/qNinj], where C(ox) is the oxide capacitance, Delta V(T) is the threshold, q is the electron charge, and N(inj) is the number of holes injected per unit area, has an initial value of [1 - 1/t(ox) Sigma N(T)], and decreases slowly with N(inj). Here t(ox) is the oxide thickness. For t(ox) = 1000A, the initial effective trapping efficiency is about 0.8.

Only a small fraction (<10%) of the trapped holes is observed to be subsequently reemitted, even at an average oxide field of 8 x 10/6/ V/cm. Thus, memory retention time is long. Hole injection or writin...