Browse Prior Art Database

Bidirectional Communications within a Binary Switching System

IP.com Disclosure Number: IPCOM000085022D
Original Publication Date: 1976-Feb-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Henle, RA: AUTHOR [+2]

Abstract

A delay line producing delayed outputs at fixed multiples of a unit amount of delay is achieved through the use of an untapped multilevel bidirectional transmission line. Odd multiples of the unit delay are available at respective terminals at one end of the line, while even multiples of the unit delay are available at respective terminals at the other end of the line.

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Bidirectional Communications within a Binary Switching System

A delay line producing delayed outputs at fixed multiples of a unit amount of delay is achieved through the use of an untapped multilevel bidirectional transmission line. Odd multiples of the unit delay are available at respective terminals at one end of the line, while even multiples of the unit delay are available at respective terminals at the other end of the line.

Fig. 1 shows a prior art circuit attached to each end of a bidirectional transmission line as shown in Fig. 2. Binary DC voltage levels are applied at each input and are received at the output at the opposite end of the line. Simultaneous bidirectional transmission is allowed by operating the transmission line at one of three voltage levels, in accordance with the following truth table: INPUT A INPUT B LINE VOLTAGE

0 0 0

0 1 1

1 0 1

1 1 2.

Delayed outputs at fixed multiples of a unit amount of delay are obtained by modifying Fig. 2, as shown in Fig. 3. The replacement of the transmission line of Fig. 2 by the delay line of Fig. 3 does not alter the overall performance of the network, except for delaying the input signals by the same amount. By shorting together the output and the input of the right-hand network, the delay at the output B of the left-hand network becomes equal to twice the line delay. It should be noted that any pulse pattern can be applied at input A and it will appear at output B two units of delay later.

By extension o...