Browse Prior Art Database

Totem Pole Driver for Capacitance Loads

IP.com Disclosure Number: IPCOM000085459D
Original Publication Date: 1976-Apr-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Colao, E: AUTHOR [+2]

Abstract

Interfacing between bipolar logic circuits and field-effect transistors (FET's) in large-scale integration (LSI) technology usually requires the logic signal to be split into complementary signals, go through some signal expansion and level shifting, in order to supply the push-pull type output stage required to drive the high-capacitive load presented by FET circuits. The major problem presented, is that the push-pull output needed to yield reasonable rise and fall times, typically introduces internal Delta I problems because both totem-pole driver devices (T9 and T10) are transiently concurrently on.

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Totem Pole Driver for Capacitance Loads

Interfacing between bipolar logic circuits and field-effect transistors (FET's) in large-scale integration (LSI) technology usually requires the logic signal to be split into complementary signals, go through some signal expansion and level shifting, in order to supply the push-pull type output stage required to drive the high-capacitive load presented by FET circuits. The major problem presented, is that the push-pull output needed to yield reasonable rise and fall times, typically introduces internal Delta I problems because both totem-pole driver devices (T9 and T10) are transiently concurrently on.

The circuit depicted in the drawing establishes the interface without the internal Delta I problems. The circuitry enclosed within the broken line labelled L1 produces complementary signals (nodes A and B) and provides signal expansion. The circuitry within the enclosed broken line labelled L2 is a level shifter with the AC advantage of active charge up and resistive discharge. The circuitry enclosed within the broken line labelled L3 serves two purposes, the first is to present the totem-pole output devices T9 and T10 with sufficient base drive, and the second is to force the "on" device (T9 and T10) to turn off before the off device turns on.

To briefly explain the operation of the circuitry, consider transistor T9 on and transistor T10 off. In this case node D is high and node C is low. Switching of the input will cause no...