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Automatic Memory Select During I Fetch Operations

IP.com Disclosure Number: IPCOM000085489D
Original Publication Date: 1976-Apr-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Aichelmann, FJ: AUTHOR [+2]

Abstract

The instruction transfer rate between a memory and an engine in a sequential engine/basic storage module (BSM) I-fetch operation, is fastest when the engine can operate continuously from the control logic of the instruction-fetch (I-fetch) buffer. This can be accomplished through automatic reloading of the I-fetch buffer, where the memory fetches the subsequent instructions while the engine is operating on instructions from the buffer.

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Automatic Memory Select During I Fetch Operations

The instruction transfer rate between a memory and an engine in a sequential engine/basic storage module (BSM) I-fetch operation, is fastest when the engine can operate continuously from the control logic of the instruction-fetch (I-fetch) buffer. This can be accomplished through automatic reloading of the I- fetch buffer, where the memory fetches the subsequent instructions while the engine is operating on instructions from the buffer.

One technique is to automatically reload buffer areas that were previously vacated during engine use by constructing a memory subsystem instruction data flow, in which the BSM control logic manages the I-fetch buffer rather the the processor. The engine now operates at logical buffer speeds rather than at buffer plus memory access speeds.

Shown is a memory subsystem's simplified instruction data flow for such a controller application. Used is a four-byte memory interface multiplexed into a two-byte engine interface with four halfwords of instruction buffering. This example could be expanded for larger buffering and different bandwidths, as required. Not shown are the detailed BSM interface control, data path, error checking control (ECC), parity checking, and timing control.

The sequential process is signalled initially by the I-fetch command, which loads the I-fetch buffer with four instructions from memory. When the engine selects an even halfword, and after it is received by the...