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Power Transistor Second Breakdown Test Circuit

IP.com Disclosure Number: IPCOM000085650D
Original Publication Date: 1976-May-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Anantha, NG: AUTHOR [+2]

Abstract

Power transistors used in transistor switching power supplies are susceptible to failures termed destructive second breakdown. The laboratory test circuit shown in the figure applies the normal operating switching waveforms to a power transistor under test, and senses the onset of second breakdown within 100 nanoseconds to take corrective action, if necessary, to prevent thermal destruction of the transistor. The circuit serves as both a device screen and as a test circuit to allow repetitive, nondestructive breakdowns of the tested device.

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Power Transistor Second Breakdown Test Circuit

Power transistors used in transistor switching power supplies are susceptible to failures termed destructive second breakdown. The laboratory test circuit shown in the figure applies the normal operating switching waveforms to a power transistor under test, and senses the onset of second breakdown within 100 nanoseconds to take corrective action, if necessary, to prevent thermal destruction of the transistor. The circuit serves as both a device screen and as a test circuit to allow repetitive, nondestructive breakdowns of the tested device.

Transistor 1 of Fig. 1 switches current from the diode loop 2 to the V(bulk) loop 3. Power dissipation is kept to a minimum by operating transistor 1 at a 2% "on" duty cycle. This allows a low-current V(bulk) supply 4 to be used, in conjunction with the trickle-charge resistor RT, to charge up the load capacitor CL.

Fig. 2 shows the IC and V(ce) waveforms on transistor 1 in the cases of normal operation, onset of second breakdown and stopping of second breakdown. The V(ce) waveform is sensed through differential comparator 5, then tested against a pulse from adjustable single-shot pulse generator 6 to detect the failure mode. This occurrence triggers pulse generators PG3 and PG4, which switch on the bypass transistors T3 and T4 (resistors R3 and R4 insure current sharing).

Current preferentially flows through the bypass transistors T3, T4, because of the bias 7 (V(bias)) applied t...