Browse Prior Art Database

T/2/L High Threshold Receiver

IP.com Disclosure Number: IPCOM000085660D
Original Publication Date: 1976-May-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 31K

Publishing Venue

IBM

Related People

Montegari, F: AUTHOR

Abstract

The circuit depicted in the drawing provides ample downlevel noise tolerance when used as an off-chip receiver, for collector drivers of both the saturating and Schottky diode clamped, nonsaturating types.

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T/2/L High Threshold Receiver

The circuit depicted in the drawing provides ample downlevel noise tolerance when used as an off-chip receiver, for collector drivers of both the saturating and Schottky diode clamped, nonsaturating types.

The emitter of transistor T2 which is normally connected directly to -Ve, is instead connected to the collector of saturated transistor T3 to produce a higher circuit input threshold. Transistor T4 restores the output downlevel to one Vce above -Ve.

Fan-out and dotting capability at the output node is similar to that of a standard AND circuit for the technology employed.

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