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Nonlatching Logic Circuit using Josephson Junctions

IP.com Disclosure Number: IPCOM000085728D
Original Publication Date: 1976-May-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Baechtold, W: AUTHOR [+2]

Abstract

A logic circuit consists of a long Josephson junction J1 connected to a bias current source Ib and having an output line terminated with its characteristic impedance. Coupled to the long junction is a loop comprising a small junction J2 and an inductance L2. An appropriate number of control currents A, B, and C serves to switch junction J1 and also couples into inductance L2.

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Nonlatching Logic Circuit using Josephson Junctions

A logic circuit consists of a long Josephson junction J1 connected to a bias current source Ib and having an output line terminated with its characteristic impedance. Coupled to the long junction is a loop comprising a small junction J2 and an inductance L2. An appropriate number of control currents A, B, and C serves to switch junction J1 and also couples into inductance L2.

Appearance of the required number of control currents, depending on whether an AND or OR function is desired, causes junction J1 to switch to its voltage state thereby transferring current into the terminated line Zo. Overshoot is prevented by a suitable RLC circuit.

Upon removal of the control current(s), a current is induced in inductance L2, and hence in the loop, which will cause junction J2 to assume its voltage state. With L2 properly chosen, this temporarily reduces current in junction J1 so as to enable it to return to its superconducting state, Since junction J2 is shunted by inductance L2, it will always reset to its superconducting state as well.

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