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Integrated Circuit Arrangements

IP.com Disclosure Number: IPCOM000085767D
Original Publication Date: 1976-Jun-01
Included in the Prior Art Database: 2005-Mar-02
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Underhill, TT: AUTHOR

Abstract

A complex control or sequence machine often consists of a plurality of integrated circuit chips requiring a multiplicity of interconnections between the chips. Since chip packages have a limited number of input and output pins, to achieve maximum utilization of the chips, such interconnections should be minimized. In certain complex electronic machines, various operations of the parts depend upon one or more sets of common logic circuits CL.

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Integrated Circuit Arrangements

A complex control or sequence machine often consists of a plurality of integrated circuit chips requiring a multiplicity of interconnections between the chips. Since chip packages have a limited number of input and output pins, to achieve maximum utilization of the chips, such interconnections should be minimized. In certain complex electronic machines, various operations of the parts depend upon one or more sets of common logic circuits CL.

Such common logic may have a large number of signal states requiring a large number of interconnections for conveying such signal states to the various chips. By repeating part or all of common logic circuits in all of the chips and providing a minimal number of control lines, the number of interconnections required for conveying the common logic signal states to all of the chip circuits is greatly reduced.

As shown in the drawing, a common logic circuit CL consists of a shift register receiving a sync pulse and a start pulse. Chip-1 has the master common logic circuit CL which supplies a plurality of state signals from the respective stages of the shift register. Such state signals travel only to the chip-1 circuits.

Each of the chips has a replica of all or part of the master circuit CL. For example, chip-2 has a circuit CL' which duplicates circuit CL. CL' receives the sync and start signals from chip-1 for replicating the CL states inside chip-2. Chip-2 need not have all of the states. If o...