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Minimizing Input Output Page Pinning in a Virtual Storage Data Processor

IP.com Disclosure Number: IPCOM000085805D
Original Publication Date: 1976-Jun-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Boggs, JK: AUTHOR

Abstract

A mechanism is provided for reducing the software overhead required for pinning or fixing pages in main storage during their usage for input/output (I/O) operations in a virtual storage data processor. This is accomplished by enabling the direct execution of I/O requests without notifying the paging supervisor of the software operating system.

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Minimizing Input Output Page Pinning in a Virtual Storage Data Processor

A mechanism is provided for reducing the software overhead required for pinning or fixing pages in main storage during their usage for input/output (I/O) operations in a virtual storage data processor. This is accomplished by enabling the direct execution of I/O requests without notifying the paging supervisor of the software operating system.

A typical implementation of the mechanism is illustrated in Figs. 1 and 2, Fig. 2 describing the construction of the address translate table shown in Fig. 1. As shown in Fig. 1, each I/O channel is provided with its own hardware directory look-aside table (DLAT) for converting virtual addresses to real storage or main storage addresses.

As indicated in Fig. 2, one bit per channel is added to each page entry in the address translate table. Each such bit will be referred to as a "channel bit" and will be turned on when the corresponding channel is, in realtime, performing an I/O data transfer into or from the virtual page. This is accomplished by the DLAT for the corresponding channel. In particular, when a given I/O channel loads a virtual address into its DLAT, then the DLAT turns on the corresponding channel bit in the address translate table. Conversely, when a virtual address is removed from the DLAT, the corresponding channel bit is turned off.

One other bit called a "don't disconnect" or "disallow disconnect" (DD) bit is also added to the address translate table. When this DD bit is on, it means that a reuse of the real page frame in main storage is disallowed, due to active I/O data transfer into or from the corresponding virtual page residing at this main store location. In other...