Browse Prior Art Database

Self Aligned Bucket Brigade Device Structure With Low Parasitic Gate to Source Capacitance

IP.com Disclosure Number: IPCOM000085956D
Original Publication Date: 1976-Jun-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 38K

Publishing Venue

IBM

Related People

Rideout, VL: AUTHOR

Abstract

Bucket brigade device (BBD) arrays are of interest in the semiconductor industry as image sensors and as shift register memories. The most widely practiced structure is shown in Fig. 1 and consists of aluminum gates and diffused regions.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Self Aligned Bucket Brigade Device Structure With Low Parasitic Gate to Source Capacitance

Bucket brigade device (BBD) arrays are of interest in the semiconductor industry as image sensors and as shift register memories. The most widely practiced structure is shown in Fig. 1 and consists of aluminum gates and diffused regions.

A major consideration in fabricating these devices is in aligning the Al gate 1 with the diffused regions. Ideally, the gate 1 will overlap the drain region 2 but not the source region 3. The gate 1 must reach to the source region 3, however, so that charge transfer will take place. If the gate 1 overlaps the drain 2 and source 3 equally so that the gate-to-source and gate-to-drain capacitances Cgd and Cgs are equal, charge transfer will not occur.

Heller and Lee (L. C. Heller and H. S. Lee, "Charge-Transfer Device Modeling", Semiconductor Silicon 1973, Proc. of the ECS Meeting, Chicago, July 1973) have shown that the charge packet transferred is proportional to C(gd) - C(gs). This difference dictates the magnitude of the charge packet transferred. Eventually this consideration dictates the performance and manufacturing yield of the BBD, especially in very large high-density arrays.

For smaller geometry structures yielding higher device packing density, the alignment problem between gate 1 and source 3 or drain 2 will be aggravated. Thus it would be desirable to develop a device structure in which the gate 1 is self-aligned with respect to the source 3, thus minimizing the parasitic overlap capacitance C(gs). Such a structure can be obtained using a combined polysilicon-aluminum gate as described hereafter.

Fig. 2 illustrates the self-aligned BBD structure. The device requires three masking steps as compared to two masking steps for the nonaligned Al gate structure shown in Fig. 1. The idea of the new structure is to deposit and define polysilicon regions which will act as half of the gate regions. Then the n+ region 5 is defined by the edges of the polysilicon regions 4. The n+ regions 5 may be either diffused or implanted.

Nitride 6 covers half of the polysilicon region 4 and this will later allow the Al 7 to contact the polysilicon 4 in these regions (as in H. L. Kalter and D. A. Miller, "Self-Aligning Metal to Polysilicon Contacts", IBM Technical Disclosure Bulletin, Vol. 14, No. 10, p. 3176, March 1972)....