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High Speed Astable Ramp Generator

IP.com Disclosure Number: IPCOM000085996D
Original Publication Date: 1976-Jul-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 45K

Publishing Venue

IBM

Related People

Hoyt, ES: AUTHOR

Abstract

This generator, which produces a symmetrical sawtooth voltage, has high speed, accuracy and stability. The positive and negative transitions of the sawtooth voltages are used to eliminate the need for rapid, preferably zero, recovery time which is difficult to design as frequency requirements increase. This generator, as shown in Fig. 1, is capable of operating in the 25 megacycle range.

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High Speed Astable Ramp Generator

This generator, which produces a symmetrical sawtooth voltage, has high speed, accuracy and stability. The positive and negative transitions of the sawtooth voltages are used to eliminate the need for rapid, preferably zero, recovery time which is difficult to design as frequency requirements increase. This generator, as shown in Fig. 1, is capable of operating in the 25 megacycle range.

The voltage at A at the input of a voltage switching circuit, which may be similar to that described in the Hoyt article entitled, "High-Speed Bidirectional Driver Circuit", IBM Technical Disclosure Bulletin, Vol. 19, No. 2, July 1976, pages 416 and 417, is at 0 volts to produce a voltage at B of +5 volts, as indicated in the pulse program in Fig. 2. The +5 volts at B drives current through diode D3 of a current steering circuit SC and reverse biases diode D4. Diode D1 is also reverse biased allowing current from positive constant-current source CC1 to flow through diode D2 to capacitor C1. The voltage at C rises at a rate determined by the current flow into C1, providing the symmetrical sawtooth voltage with a positive slope.

The voltage at C is fed into a high impedance amplifier or buffer 10 to produce at D a similar voltage at a low impedance. The voltage at D continues to increase until it reaches a given magnitude at which the output voltage at terminal T1, normally at +3 volts drops to 0 volts to produce a relatively sharp pulse or spike which sets the output of the latch to +3 volts. The +3 volt output of the latch is fed back to A to switch the voltage at B to -5 volts.

The -5 volts at B reverse biases diode D3, permitting D4 to turn on to discharge capacitor C1 through the negative constant-current source CC2. Diode D1 is also turned on and diode D2 is reverse biased. The voltage at C decreases at a rate deter...