Browse Prior Art Database

Delta Modulator

IP.com Disclosure Number: IPCOM000086015D
Original Publication Date: 1976-Jul-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Agostini, DL: AUTHOR [+4]

Abstract

The delta modulator 10 is particularly useful as an analog-to-digital (A/D) converter.

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Delta Modulator

The delta modulator 10 is particularly useful as an analog-to-digital (A/D) converter.

Comparator 11 compares the level of the analog input signal ANALOG IN to the signal fed back from the D/A converter 12. The output of comparator 11 is a logical "1" or "0" depending on which of its inputs is greater.

Delta modulator 10 is advanced by the ADVANCE pulse, cf. Fig. 2, which clocks the output of comparator 11 into the dual flip-flop 13. The Q, i.e., not or false, output of flip-flop 13 is a nonreturn-to-zero (NRZ) digital train which is a delta-modulated representation of the analog input. Since this output is digital, it can be processed conveniently using digital techniques. For example, it can be shifted serially by a shift register, not shown, to provide a multitapped digital delay line for use with a target simulator. If desired, it may also be time multiplexed, stored, recorded, time compressed, time expanded, gated, etc., as any other digital signal and yet maintain the inherent fidelity of modulation.

The Q and Q (true or false) outputs of flip-flop 13 are sampled when the SAMPLE pulse, cf. Fig. 2, enables the NAND gate circuits 17 and 18. The outputs of NAND's 17 and 18 are used to feed up/down pulse trains UP and DOWN into the up/down counter 19. Counter 19 advances or decrements depending on the input being pulsed.

Since the SAMPLE pulse controlling the change rate of counter 19 is delayed from the ADVANCE pulse, a controlled settling time...