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Sample and Hold Circuit

IP.com Disclosure Number: IPCOM000086068D
Original Publication Date: 1976-Jul-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Maillet, JC: AUTHOR

Abstract

Operational amplifiers fit perfectly the design of circuits performing the sample and hold function. Very few additional elements are in fact needed e.g., a capacitor for storing the sampled level. This capacitor may be connected in a feedback loop on the amplifier output stage. One drawback of such a circuit is due to the capacitor leakage. A solution is proposed here to compensate for these leakages.

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Sample and Hold Circuit

Operational amplifiers fit perfectly the design of circuits performing the sample and hold function. Very few additional elements are in fact needed e.g., a capacitor for storing the sampled level. This capacitor may be connected in a feedback loop on the amplifier output stage. One drawback of such a circuit is due to the capacitor leakage. A solution is proposed here to compensate for these leakages.

As shown on the figure, the operational amplifier is provided with a sampling input controlling the current source T11. While the input signal is applied to the none inverting input T12 of the operational amplifier, its output is fed back to the inverting input T13. The holding capacitor C is connected between the output of the operational amplifier and the output of its differential input stage.

The leakage current i(3), due to the base current i(2) of transistor T'1, is compensated here by a current i(1) provided by a compensation circuit including T1, T2, the two resistors R and the current source T3 providing a current Io.

The best compensation for the leakage current will be obtained when the magnitude of i(1) is made as close as possible to i(2) so that i(3) = 0.

Let I(o) be the current provided by T'3 to the intermediate stage T'1, T'2. Then:

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