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Controlling Variable Refresh Cycles in Dynamic Semiconductor Storages

IP.com Disclosure Number: IPCOM000086292D
Original Publication Date: 1976-Aug-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 25K

Publishing Venue

IBM

Related People

Barsuhn, H: AUTHOR [+4]

Abstract

Highly integrated semiconductor storages with dynamic storage cells consisting, for example, of field-effect transistors with a series connected capacitor, necessitate that the information stored in them be refreshed at particular intervals. When the contents of a storage or a storage area are refreshed, it is not possible to write data into or read them from storage.

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Controlling Variable Refresh Cycles in Dynamic Semiconductor Storages

Highly integrated semiconductor storages with dynamic storage cells consisting, for example, of field-effect transistors with a series connected capacitor, necessitate that the information stored in them be refreshed at particular intervals. When the contents of a storage or a storage area are refreshed, it is not possible to write data into or read them from storage.

This reduces the availability of such a storage. It is known to associate such a storage with a buffer store which generally is arranged on the same storage chip. Each access to the storage matrix causes a whole data block to be transferred to the data buffer store which is then read, for example, byte-by-byte, at an essentially increased speed. In the typical storages currently used the transfer of a whole data block from or to the data buffer store requires, in most cases, more time than a normal refresh cycle; the refresh frequency is about 1/10th of the maximum storage access frequency.

To increase the availability of such a storage, refresh cycles awaiting execution can be scheduled in such a manner that they are carried out in the background (in the dynamic storage part) at a time when data are written into or read from the data buffer store. In the circuit shown the refresh counter, by means of its trigger pulses, initiates a refresh cycle roughly every 15 ms, i.e., to a fixed time pattern. If data are transferred as descri...