Browse Prior Art Database

True, Push Pull Driver

IP.com Disclosure Number: IPCOM000086311D
Original Publication Date: 1976-Aug-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Hsu, SB: AUTHOR

Abstract

A true, pushpull driver is described employing enhancement mode/depletion mode field-effect transistors (FET's).

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True, Push Pull Driver

A true, pushpull driver is described employing enhancement mode/depletion mode field-effect transistors (FET's).

Fig. 1 shows two inverters, each composed of a depletion mode load and an enhancement mode FET device, interconnected between an input node and an output node. The first inverter is composed of depletion mode FET 1 and enhancement mode FET 2, and the second inverter is composed of depletion mode FET device 3 and enhancement mode FET device 4. FET 1 is self-biased as a depletion mode load device and has its source connected to the drain of the enhancement mode FET device 2, whose source is connected to ground.

Depletion mode FET device 3 has its drain connected to drain supply VDD and its source connected to the output node and connected to the drain of the enhancement mode FET device 4, whose source is connected to ground. The input node is connected to the gate of FET device 2 and FET device 3. Node A for the source of FET device 1 is connected to the gate of FET device 4.

In operation, a low-input signal at the input signal node turns enhancement mode device 2 off and reduces the conductivity of the depletion device 3. With FET device 2 off, the potential in node A rises turning on enhancement mode FET device 4 thereby lowering the output node. When the input node rises in potential, FET device 2 is turned on and FET device 3 is turned on harder than was its original state. With FET device 2 on, the node A drops in potential th...