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Monitor Circuit for Leakage Sensitive FET Devices

IP.com Disclosure Number: IPCOM000086312D
Original Publication Date: 1976-Aug-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 27K

Publishing Venue

IBM

Related People

Beilstein, KE: AUTHOR [+2]

Abstract

A pair of suitably connected field-effect transistor (FET) devices permit small leakage currents in the subpicoamp range to be measured on standard parametric testers by a charge retention time technique. The FET circuit also permits gate diffusion overlap capacitance to be measured. The leakage distributions per wafer provided by the circuit is also an indication of the processing line quality.

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Monitor Circuit for Leakage Sensitive FET Devices

A pair of suitably connected field-effect transistor (FET) devices permit small leakage currents in the subpicoamp range to be measured on standard parametric testers by a charge retention time technique. The FET circuit also permits gate diffusion overlap capacitance to be measured. The leakage distributions per wafer provided by the circuit is also an indication of the processing line quality.

Fig. 1 shows the monitor circuit which is incorporated into the kerf of a chip included in a wafer being processed. A charge is injected by device Q1 onto a storage node 10 and the potential is monitored as a function of time by device Q2. The gate of Q2 is connected to the storage node 10 and is a dominant capacitance of the storage node. The gate voltage pulse is applied to device Q1 to place a known voltage, i.e., V drain on the storage node 10. The gate voltage pulse is at least a threshold above the drain voltage. Figs. 2a and 2b show the pulses applied to V(gate) and V(drain) of device Q1. Simultaneously, current is measured by an ammeter 12 through device Q2.

Fig. 2c shows the current through the ammeter 12 as a function of time. A small shifting current is detected by the ammeter 12 at the end of the charging circuit or when V(gate) drops. The change in current is due to the charging of the overlap capacitance in device Q1. The shifting current permits an indirect measurement of the overlap capacitance of Q1 to be...