Browse Prior Art Database

Extendable Control Store

IP.com Disclosure Number: IPCOM000086340D
Original Publication Date: 1976-Aug-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 45K

Publishing Venue

IBM

Related People

Brooks, EG: AUTHOR

Abstract

Control circuitry is incorporated in a computer system to enable a microprogrammed processor to be varied in cost and performance, by employing only that amount of real control store (including zero amount) required for a particular application. No hardware, other than the control store itself, is modified.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 3

Extendable Control Store

Control circuitry is incorporated in a computer system to enable a microprogrammed processor to be varied in cost and performance, by employing only that amount of real control store (including zero amount) required for a particular application. No hardware, other than the control store itself, is modified.

In the drawing, control store 10 is shown in dashed lines because its size is variable. During system initialization, an address limit designating amount of real control store is loaded into register 65. Also, the starting point address of the extension of control store in main storage 15 is loaded into register 85.

During operation of the computer system, the address of the next microinstruction to be executed is entered into control store address register 35. The address in register 35 is compared by comparator 70 with the address in register 65. If the result of the comparison is "equal to or less than", the microinstruction is in real control store 10 and comparator 70 provides a signal on line 71 to condition gate 72 for passing the address from register 35 to control store 10.

If comparator 70 develops a "greater than" result, the address in register 35 is pointing to a microinstruction not in real control store 10 but in main storage
15. The main storage address under this condition is formed by concatenating the address in register 35 with the address in register 85. Comparator 70 provides a signal on line 73 which is applied to main storage control logic 90 where the concatenation is performed. The concatenated address is then entered into main storage address register 20, which normally receives an address from instruction address register 25. Control 60 provides a signal for controlling the en...