Browse Prior Art Database

Four Square MIL Ten Microwatt Memory Cell

IP.com Disclosure Number: IPCOM000086398D
Original Publication Date: 1976-Sep-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 2 page(s) / 26K

Publishing Venue

IBM

Related People

Atwood, BC: AUTHOR

Abstract

A high-density low-power switching flip-flop circuit utilizing parallel bipolar transistors in each leg of the circuit is provided with a relatively high-valued collector resistor coupling the collectors of the parallel transistors in each leg of the circuit. This cell utilizes 10 microwatts of power and is made with three micron thick one ohm centimeter epitaxial semiconductor material. By increasing the resistivity of the epitaxial material, proportional power reduction can be achieved.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 88% of the total text.

Page 1 of 2

Four Square MIL Ten Microwatt Memory Cell

A high-density low-power switching flip-flop circuit utilizing parallel bipolar transistors in each leg of the circuit is provided with a relatively high-valued collector resistor coupling the collectors of the parallel transistors in each leg of the circuit. This cell utilizes 10 microwatts of power and is made with three micron thick one ohm centimeter epitaxial semiconductor material. By increasing the resistivity of the epitaxial material, proportional power reduction can be achieved.

The cell comprises a pair of cross-coupled bipolar transistors 10 and 11 whose emitters are coupled to a common voltage point V1. The base of each of the transistors 10 and 11 is coupled to the collector of the other transistor through a resistor 13 or 14. The base of each of the transistors 10 and 11 is further coupled to a parallel transistor 16 or 17. The emitter of each of the parallel transistors 16 and 17 is coupled to a bit sense line 18 or 19.

The collectors of parallel transistors 10 and 16 are coupled through a high- value resistive element 20 and the collectors of transistors 11 and 17 are coupled through a similar high value resistance 21. The collectors of the parallel transistors 16 and 17 are also provided with effective collector resistances 22 and 23 which are coupled to a voltage source V2.

This circuit has a particular advantage in that it is readily adapted to integration with the load resistor being provided within t...