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Manufacturing Integrated Circuits Containing Josephson Junctions of Reduced Size Effect

IP.com Disclosure Number: IPCOM000086549D
Original Publication Date: 1976-Sep-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 1 page(s) / 11K

Publishing Venue

IBM

Related People

Forster, T: AUTHOR [+3]

Abstract

When Josephson junctions of different geometry are made simultaneously on the same wafer surface, the current density in large junctions is different, usually higher than that in small junctions, e.g., by about 30% for junctions of 30 and 300 mu m/2/. This size-effect is attributed to influences upon the tunnel barrier along its edge during oxidation by material surrounding the junction.

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Manufacturing Integrated Circuits Containing Josephson Junctions of Reduced Size Effect

When Josephson junctions of different geometry are made simultaneously on the same wafer surface, the current density in large junctions is different, usually higher than that in small junctions, e.g., by about 30% for junctions of 30 and 300 mu m/2/. This size-effect is attributed to influences upon the tunnel barrier along its edge during oxidation by material surrounding the junction.

The size-effect can be reduced to much lower values, i.e., similar current density can be obtained for large and small area junctions by proper choice of the material exposed to the RF-glow discharge during barrier formation. This can be done by either selecting a material for the wafer surface insulation which exhibits a low sputtering rate or by covering the wafer surface outside the junctions with a thin film of proper material, such as Si, Nb, Al(2)O(3). For some applications, deposition of a multilayer combining the properties of low sputtering rate, conduction at room temperature to uniformly distribute surface charge, good adhesion, etc., is advantageous.

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