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# Simulation Model for Field Effect Transistors

IP.com Disclosure Number: IPCOM000086556D
Original Publication Date: 1976-Sep-01
Included in the Prior Art Database: 2005-Mar-03
Document File: 3 page(s) / 53K

IBM

## Related People

Martin, DH: AUTHOR

## Abstract

This FET circuit simulation model has only fixed capacitors and current sources whose magnitudes are identical functions of the capacitor voltages. The function can be represented by an equation or a table of values, and contains no discontinuities. The model is valid for the cutoff, saturated and linear regions of operation.

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Simulation Model for Field Effect Transistors

This FET circuit simulation model has only fixed capacitors and current sources whose magnitudes are identical functions of the capacitor voltages. The function can be represented by an equation or a table of values, and contains no discontinuities.

The model is valid for the cutoff, saturated and linear regions of operation.

The method used simplifies the modelling of nonideal devices and, by incorporating only continuous I-V curves and few elements, aids convergence of circuit analysis programs. Additionally, this method makes it easier to visualize the effects of nonideal device properties. To explain the basis of the model, a simple formula is derived and then used, in conjunction with theoretical device conductance equations, to deduce the classical FET characteristics. A simulation model is derived and extended to include channel capacitance.

This theory assumes that the device is uniform so that end effects in short- channel devices are not accommodated.

Fig. 1 shows a curve of device conductance, G(V(g) - V(s)), at V(ds) = 0, where g, s and d indicate gate, source and drain connections.

When a voltage is applied between drain and source (Fig. 2), the conductance of the element delta z at z is: G(V(g) - V) x L over delta z Where V is the channel voltage at z. With current I flowing in the channel the drop, delta V, across the element is: delta V = 1 x delta z over L x 1 over G(V(g) - V) Hence, by rewriting, integrating and substituting x = V(g) - V yields:

(Image Omitted)

This equation is fundamental to the model and comprises two terms which are the same function of the two voltages V(gs) and V(gd). Most FETs are inherently symmetrical and the classical equations are unsymmetrical. From classical FET theory the function G(x) of Fig. 1 is: G(x) = 0 for x < or = V(t); K(x - V(t)) for x > or = V(t) where V(t) is the threshold voltage of the device, and K is a constant for a particular device. Hence:

(Image Omitted)

Thus, from the classical conductance equation, we can derive the classical device characteristic equations (2) through (4). In the nonideal case the dotted line of Fig. 1 shows a measured device conductance curve. The theory, as far as equation (1), is quite general so that the equation can also be applied to this nonideal case.

Thus current I in equation...